Buffering - Hitachi H8/3048 Hardware Manual

Single-chip microcomputer
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10.4.8 Buffering

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Buffering operates differently depending on whether a general register is an output compare
register or an input capture register, with further differences in reset-synchronized PWM mode
and complementary PWM mode. Buffering is available only in channels 3 and 4. Buffering
operations under the conditions mentioned above are described next.
General register used for output compare
The buffer register value is transferred to the general register at compare match. See
figure 10-46.
BR
General register used for input capture
The TCNT value is transferred to the general register at input capture. The previous general
register value is transferred to the buffer register.
See figure 10-47.
Input capture signal
BR
Compare match signal
GR
Figure 10-46 Compare Match Buffering
GR
Figure 10-47 Input Capture Buffering
367
Comparator
TCNT
TCNT

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