16-Bit Timer Register (Tmr)/16-Bit Reload Register (Tmrlr) - Fujitsu F2MC-16LX Hardware Manual

16.2.2 16-Bit Timer Register (TMR)/16-Bit Reload Register
(TMRLR)
This section describes the configuration and functions of the 16-bit timer register
(TMR)/16-bit reload register (TMRLR).
I 16-Bit timer register (TMR)/16-bit reload register (TMRLR)
The bit configuration of the 16-bit timer register (TMR)/16-bit reload register (TMRLR) is shown
below.
0000CD D15
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Reading/writing
0000CC D07
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) Reading/writing
I 16-Bit timer register (TMR)
This register is used to read the counter value of the 16-bit decrement counter. If counter
operation is enabled (TMCSR: CNTE = 1) and counting starts, the value in the 16-bit reload
register is loaded into this register to start count-down. In count stop state (TMCSR: CNTE = 0),
the value of this register is retained.
Note:
This register can be read during counter operation, but always use a word transfer
instruction (such as "MOVW A 003AH").
The 16-bit timer register (TMR) is functionally a read-only register, though it is allocated at
the same address as the write-only 16-bit reload register (TMRLR). Thus, write operations
will not affect the TMR value, even though writing to TMRLR is performed.
15 14 13 12
D14 D13 D12
(X) (X) (X) (X)
7 6 5 4
D06 D05 D04
(X) (X) (X) (X)
CHAPTER 16 16-BIT RELOAD TIMER
11 10 9 8
D11 D10 D09 D08
(X) (X) (X) (X)
3 2 1 0
D03 D02 D01 D00
(X) (X) (X) (X)
TMR/TMLR (upper bits)
Initial value
TMR/TMRLR (lower bits)
Initial value
319