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CHAPTER 25 PWC TIMER (ONLY MB90485 SERIES)
25.3.1 PWC Control/Status Register (PWCSR0 to PWCSR2)
This section describes the configuration and functions of the PWC control/status
register (PWCSR0 to PWCSR2).
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PWC control/status register (PWCSR0 to PWCSR2)
Figure 25.3-2 shows the bit configuration of the PWC control/status register (PWCSR0 to
PWCSR2).
Figure 25.3-2 Bit configuration of the PWC control/status register (PWCSR0 to PWCSR2)
ch.0 000077
ch.1 00007B
ch.2 00007F
ch.0 000076
ch.1 00007A
ch.2 00007E
The functions of bits in the PWC control/status register (PWCSR0 to PWCSR2) are described
below.
[bit15, bit14] STRT, STOP (timer start bit, timer stop bit)
These bits are used to start/restart/stop the 16-bit up-count timer. The operation state of the
timer is displayed in read operations.
The tables below show the functions of the STRT and STOP bits.
Table 25.3-1 Functions related to Write operations (operation control of 16-bit up-count
timer)
STRT
0
0
1
1
* : A clear bit-operation instruction is available
520
15
14
13
H
STRT STOP EDIR EDIE OVIR OVIE ERR
H
H
(R/W) (R/W)
(R) (R/W) (R/W) (R/W)
(0)
(0)
(0)
7
6
5
H
CKS1 CKS0 PIS1 PIS0
H
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
H
(0)
(0)
(0)
STOP
0
No function/no effect on operation
1
Timer start/restart (when counting is allowed)
0
Timer operation forcible stop (when counting is prohibited)
1
No function/no effect on operation
12
11
10
9
(R)
(0)
(0)
(0)
(0)
4
3
2
1
S/C MOD2 MOD1 MOD0 PWCSR
(0)
(0)
(0)
(0)
Operation control function
8
Bit No.
Reserved
(-)
Read/write
(X)
Initial value
0
Read/write
(0)
Initial value
*
*
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