Crc Calculation - Renesas M16C/6NK Hardware Manual

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M16C/6N Group (M16C/6NK, M16C/6NM)

18. CRC Calculation

The Cyclic Redundancy Check (CRC) operation detects an error in data blocks. The microcomputer uses a
generator polynomial of CRC-CCITT (X
The CRC code consists of 16 bits which are generated for each data block in given length, separated in 8-bit
unit. After the initial value is set in the CRCD register, the CRC code is set in that register each time one byte
of data is written to the CRCIN register. CRC code generation for one-byte data is finished in two cycles.
Figure 18.1 shows the block diagram of the CRC circuit. Figure 18.2 shows the CRC-related registers. Figure
18.3 shows the calculation example using the CRC operation.
Figure 18.1 CRC Circuit Block Diagram
CRC Data Register
(b15)
b7
CRC Input Register
b7
Figure 18.2 CRCD Register and CRCIN Register
Rev.2.00 Nov 28, 2005
REJ09B0124-0200
16 12
+ X
Data bus high-order
Data bus low-order
CRC code generating circuit
CRCIN register
(b8)
b0 b7 b0
When data is written to the CRCIN register after setting
the initial value in the CRCD register, the CRC code can
be read out from the CRCD register.
b0
Data input
page 221 of 378
5
+ X + 1) to generate CRC code.
Low-order 8 bits
CRCD register
16 12 5
x +x +x +1
Symbol Address
CRCD 03BDh to 03BCh
Function
Symbol Address
CRCIN 03BEh
Function
18. CRC Calculation
High-order 8 bits
After Reset
Indeterminate
Setting Range
0000h to FFFFh
After Reset
Indeterminate
Setting Range
00h to FFh
RW
RW
RW
RW