Crc Calculation - Renesas M16C/62P Series Hardware Manual

M16C/62P Group (M16C/62P, M16C/62PT)

20. CRC Calculation

The Cyclic Redundancy Check (CRC) operation detects an error in data blocks. The microcomputer uses a generator
polynomial of CRC_CCITT (X
The CRC code consists of 16 bits which are generated for each data block in given length, separated in 8 bit units.
After the initial value is set in the CRCD register, the CRC code is set in that register each time one byte of data is
written to the CRCIN register. CRC code generation for one-byte data is finished in two cycles.
Figure 20.1 shows the CRC Circuit Block Diagram. Figure 20.2 shows the CRC-related Registers.
Figure 20.3 shows the Calculation Example using the CRC Operation.
Figure 20.1 CRC Circuit Block Diagram
CRC Data Register
(b15) (b8)
b7 b0 b7
CRC Input Register
b7 b0
Figure 20.2 CRCD and CRCIN Registers
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
16 12 5
+ X + X + 1) to generate CRC code.
Data bus high-order
Data bus low-order
Eight low-order bits
CRCD register
CRC code generating circuit
CRCIN register
b0
Symbol
CRCD
When data is w ritten to the CRCIN register after setting the initial value in
the CRCD register, the CRC code can be read out from the CRCD
register.
Symbol
CRCIN
Data input
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16 12 5
X + X + X + 1
Address
03BDh to 03BCh
Function
Address
03BEh
Function
20. CRC Calculation
Eight high-order bits
After Reset
Indeterminate
Setting Range
0000h to FFFFh
After Reset
Indeterminate
Setting Range
00h to FFh
010-62245566 13810019655
RW
RW
RW
RW