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M16C/62P Group (M16C/62P, M16C/62PT)
20. CRC Calculation
The Cyclic Redundancy Check (CRC) operation detects an error in data blocks. The microcomputer uses
a generator polynomial of CRC_CCITT (X
The CRC code consists of 16 bits which are generated for each data block in given length, separated in 8
bit units. After the initial value is set in the CRCD register, the CRC code is set in that register each time one
byte of data is written to the CRCIN register. CRC code generation for one-byte data is finished in two
cycles.
Figure 20.1 shows the block diagram of the CRC circuit. Figure 20.2 shows the CRC-related registers.
Figure 20.3 shows the calculation example using the CRC operation.
Figure 20.1 CRC Circuit Block Diagram
CRC Data Register
(b15)
b7
CRC Input Register
b7
Figure 20.2 CRCD Register and CRCIN Register
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
16
CRC code generating circuit
CRCIN register
(b8)
b0 b7
b0
When data is written to the CRCIN register after setting
the initial value in the CRCD register, the CRC code can
be read out from the CRCD register.
b0
Data input
page 226
f o
3
6
4
12
5
+ X
+ X
+ 1) to generate CRC code.
Data bus high-order
Data bus low-order
Eight low-order bits
CRCD register
16
12
5
x
+ x
+ x
+ 1
Symbol
Address
CRCD
03BDh to 03BCh
Function
Symbo
Address
CRCIN
03BEh
Function
20. CRC Calculation
Eight high-order bits
After Reset
Indeterminate
Setting Range
RW
0000h to FFFFh
RW
After Reset
Indeterminate
Setting Range
RW
00h to FFh
RW
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