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Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
19.5 Operational Modes
The CAN module has the following four operational modes.
• CAN Reset/Initialization Mode
• CAN Operation Mode
• CAN Sleep Mode
• CAN Interface Sleep Mode
Figure 19.12 shows transition between operational modes.
MCU Reset
CAN interface
sleep mode
CCLK3, CCLK7: Bits in CCLKR register
Reset, Sleep, RetBusOff: Bits in CiCTLR register ( i = 0, 1)
State_Reset, State_BusOff: Bits in CiSTR register
Figure 19.12 Transition Between Operational Modes
19.5.1 CAN Reset/Initialization Mode
The CAN reset/initialization mode is activated upon MCU reset or by setting the Reset bit in the CiCTLR
register ( i = 0, 1) to "1". If the Reset bit is set to "1", check that the State_Reset bit in the CiSTR register is
set to "1".
Entering the CAN reset/initialization mode initiates the following functions by the module:
• CAN communication is impossible.
• When the CAN reset/initialization mode is activated during an ongoing transmission in operation
mode, the module suspends the mode transition until completion of the transmission (successful,
arbitration loss, or error detection). Then, the State_Reset bit is set to "1", and the CAN reset/initialization
mode is activated.
• The CiMCTLj (j = 0 to 15), CiSTR, CiICR, CiIDR, CiRECR, CiTECR and CiTSR registers are initialized.
All these registers are locked to prevent CPU modification.
• The CiCTLR, CiCONR, CiGMR, CiLMAR and CiLMBR registers and the CANi message box retain their
contents and are available for CPU access.
Rev.2.00
Nov 28, 2005
REJ09B0124-0200
CAN reset/initialization
mode
State_Reset = 1
Sleep = 1
Sleep = 0
and
Reset = 1
Reset = 0
CCLK3 = 1 or
CCLK7 = 1
CAN sleep mode
CCLK3 = 0 or
CCLK7 = 0
page 234 of 378
Reset = 0
CAN operation mode
Reset = 1
and
TEC > 255
Reset = 1
19. CAN Module
State_Reset = 0
when 11 consecutive
recessive bits are
detected 128 times
or
RetBusOff = 1
Bus off state
State_BusOff = 1
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