Table 6. Memory Access Error Generation - ST STM32WL5 Series Reference Manual

RM0453
Hide protected
memory
(HDPADIS = 1)
Memory
access
(1)
type
Fetch
Read
Write
Fetch
Read
Write
Fetch
Read
Write
Fetch
Read
Write
Illegal and error event generated
Granted
1. Illegal: security infringement
S: ila_event due to illegal security infringement
P: ila_event due to illegal privileged infringement
S and P: ila_event due to secure and privileged infringement
2. Only for CPU accesses. A DMA access does not generate a bus error.
3. When hide protected area is privileged.
4. When hide protected area is secure.

Table 6. Memory access error generation

Secure privileged
memory
RM0453 Rev 1
Global security controller (GTZC)
Secure Non-secure
unprivileged privileged
memory memory
Non-secure
unprivileged
memory
81/1461
96