ST STM32WL5 Series Reference Manual page 110

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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Embedded Flash memory (FLASH)
PGAERR is set if one of the following conditions occurs:
Alignment programming errors are individually checked per CPU. No checks are
available for simultaneous multi CPU programming. HSEM or other firmware
mechanisms must be used to prevent simultaneous multi CPU programming.
PGSERR: programming sequence error
PGSERR is set if one of the following conditions occurs:
WRPERR: write protection error
WRPERR is set if one of the following conditions occurs:
MISSERR: fast programming data miss error
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In standard programming, the first word to be programmed is not aligned with a
double-word address, or the second word does not belong to the same double-
word address.
In fast programming, the data to program does not belong to the same row than
the previous programmed double-words, or the address to program is not greater
than the previous one.
In the standard programming sequence or the fast programming sequence, a data
is written when PG and FSTPG are cleared.
In the standard programming sequence or the fast programming sequence, MER
and PER are not cleared when PG or FSTPG is set.
In the fast programming sequence, the mass erase is not performed before setting
the FSTPG bit.
In the mass erase sequence, PG, FSTPG, and PER are not cleared when MER is
set, when the security of the flash allows a mass erase. A non-secure mass erase
request on a secure Flash memory does not set a PGSERR. An illegal access
event is generated instead.
In the page erase sequence, PG, FSTPG and MER are not cleared when PER is
set, when the security of the page allows access. When the security of this page
does not allow access, no PGSERR is set but an illegal access event is generated
instead.
PGSERR is set also if PROGERR, SIZERR, PGAERR, WRPERR, MISSERR,
FASTERR or PGSERR is set due to a previous programming error.
In the fast programming sequence, if the page containing the row to be
programmed has not been erased by the last page erase action (If a mass erase
has been done, it is allowed to program rows on higher order pages but not on
lower order)
Attempt to program or erase in a write protected area (WRP) or in a PCROP area,
when the security of the area allows access. When the security of this area does
not allow access, no WRPERR is set but an illegal access event is generated
instead.
Attempt to perform a mass erase when one page or more is protected by WRP or
PCROP, when the security of the flash allows a mass erase. A non-secure mass
erase request on a secure Flash memory does not set a WRPERR. An illegal
access event is generated instead.
The debug features are connected or the boot is executed from SRAM or from
system Flash memory when the readout protection (RDP) is set to level 1.
Attempt to modify the option bytes when the readout protection (RDP) is set to
Level 2, except when requested by the secure CPU2.
RM0453 Rev 1
RM0453

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