ECODRIVE03-FL*-04VRS
CPL - Clear Position Lag
CPL 1
CPS - Compare and Set a Bit
CPS V600
= +
>
CPS V600
= +12345.123 1234.12 M2.02.0
>
DOK-ECODR3-FL*-04VRS**-FK01-EN-P
Axis: 1
The position lag of the axis is set to zero on a one-time basis. Normally,
this action is useful only for special tasks such as moving to a positive
stop. When this task is performed, buildup of a substantial position lag is
possible because the monitoring systems are deactivated and the
performance of the drive has been affected.
This command directly accesses the position
control circuit. It is therefore possible for
unauthorized changes to be made in the values
for length, position and acceleration.
CAUTION
The program proceeds to the next instruction following the time period of
one cycle.
V601
V602 M2.02.0
Result Bit
DKC21.3 :
DKC 3.3 :
Tolerance Range
Compare Operand 2
Operational Sign for Compare Operand 2
Compare Conditions
=
equal to
>
greater than
<
less than
>=
greater than or equal to
<=
less than or equal to
<>
not equal to
Compare Operand 1
The result bit is set when the comparison has been made. Otherwise, the
result bit is deleted. For the compare conditons 'same' and 'different,' the
comparison is met when the difference between the two operands lies
within the tolerance range.
The program proceeds to the next instruction following the time period of
one cycle.
Writing the User Program
or
M2, M3, M4 , M8
Q0.00.4-Q0.01.3
Q2,020,0-Q2,050,7
(with tolerance range)
(with tolerance range)
6-31
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