Ebi Page Control Register - Ebipcr - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
EBI Page Control Register – EBIPCR
This register specifies the EBI page read configuration setting.
Offset: 0x004
Reset value: 0x0000_0F00
31
Type/Reset
23
Type/Reset RW 0 RW
15
Type/Reset
7
Reserved
Type/Reset
Bits Field
[23:16] PAGEOPEN Maximum Page Open Time
[11:8] RDPG
[4] INCHIT
[1:0] PAGELEN
Rev. 1.10
30 29 28
22 21 20
0 RW 0 RW
14 13 12
Reserved
6 5 4
INCHIT
RW
Descriptions
Sets the maximum interval of consecutive cycles that a page can be considered
open. The cycle unit is basic on an HCLK clock period. Note the PAGEOPEN field
should not be set to 0 if the page read is enabled.
Page Read Access Time
0000: 1 HCLK clock period
0001: 1 HCLK clock period
0010: 2 HCLK clock periods
........
1111: 15 HCLK clock periods
Sets the number of the cycles for an intra-page page read access time. The cycle
unit is basic on an HCLK clock period.
Incremental Addresses Hit
0: Page hits that occurred on any member in a page
1: Page hits only on incremental addresses
Sets the page hits that occurred on any member in a page or only on incremental
addresses.
Page Length
00: 4 members in a page
01: 8 members in a page
10: 16 members in a page
11: 32 members in a page
Sets the amount of members in a page.
531 of 590
27 26
Reserved
19 18
PAGEOPEN
0 RW 0 RW 0 RW
11 10
RW 1 RW 1 RW
3 2
Reserved
0
25 24
17 16
0 RW 0
9 8
RDPG
1 RW 1
1 0
PAGELEN
RW 0 RW 0
November 28, 2018