Cyclic Redundancy Check (Crc); Introduction; Features; Figure 206. Crc Block Diagram - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
27

Cyclic Redundancy Check (CRC)

Introduction

The CRC (Cyclic Redundancy Check) calculation unit is an error detection technique test algorithm
and uses to verify data transmission or storage data correctness. A CRC calculation takes a data
stream or a block of data as input and generates a 16-bit or 32-bit output remainder. Ordinarily,
a data stream is suffixed by a CRC code and used as a checksum when being sent or stored.
Therefore, the received or restored data stream is calculated by the same generator polynomial as
described above. If the new CRC code result does not match the one calculated earlier, that means
data stream contains a data error.
CRC Control
Register
CRC Seed
Register
CRC Data
Register
B3
B2
MUX 1's COMP
B1
B0
BYTE
REVERSE
CRC Sum
Register

Figure 206. CRC Block Diagram

Features

▄
Support CRC16 polynomial: 0x8005, X
▄
Support CCITT CRC16 polynomial: 0x1021, X
▄
Support IEEE-802.3 CRC32 polynomial: 0x04C11DB7, X
X 10 + X 8 + X
▄
Support 1's complement, byte reverse & bit reverse operation on data and checksum
▄
Support byte, half-word & word data size
▄
Programmable CRC initial seed value
▄
CRC computation done in 1 AHB clock cycle for 8-bit data and 4 AHB clock cycles for 32-bit data
▄
Support PDMA to complete a CRC computation of a block of memory
Rev. 1.10
CCITT-16
POLY
CRC-16
BIT
POLY
REVERSE
CRC-32
POLY
16
7 + X 5 + X 4 + X 2 + X + 1
559 of 590
CRC
MUX
REG
MUX
CRC FSM
+ X 15 + X 2 + 1
+ X + X + 1
16 12 5
32 + X 26 + X
BIT BYTE
1's COMP
REVERSE REVERSE
23 + X 22 + X 16 + X 12 + X 11 +
November 28, 2018