Watchdog Timer Status Register - Wdtsr - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
Watchdog Timer Status Register – WDTSR
This register specifies the Watchdog timer status.
Offset: 0x00C
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[1] WDTERR
[0] WDTUF
Rev. 1.10
30 29 28
22 21 20
14 13 12
6 5 4
Reserved
Descriptions
Watchdog Timer Error
0: No Watchdog timer error has occurred since the last read of this register
1: A Watchdog timer error has occurred since the last read of this register
Note: A reload operation when the Watchdog timer counter value is larger than
WDTD causes a Watchdog timer error. Note this bit is a write one clear flag.
Watchdog timer Underflow
0: No Watchdog timer underflow since the last read of this register
1: A Watchdog timer underflow has occurred since the last read of this register
Note that this bit is a write-one clear flag.
381 of 590
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
WDTERR
WC
25 24
17 16
9 8
1 0
WDTUF
0 WC 0
November 28, 2018