Figure 80. Center-Aligned Counting Example; Figure 81. Update Event 1 Dependent Repetition Mechanism Example - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
CK_PSC
CNT_EN
CK_CNT
CNTR
CRR
CRR Shadow Register
Counter Overflow
Counter Underflow
Update Event 1 Flag

Figure 80. Center-aligned Counting Example

Repetition Down-counter Operation
The update event 1 is usually generated at each overflow or underflow event occurrence. However,
when the repetition operation is active by assigning a non-zero value into the REPR register, the
update event is only generated if the REPR counter has reached zero. The REPR value is decreased
when the following conditions occur:
▄
At each counter overflow in the up-counting mode
▄
At each counter underflow in the down-counting mode
▄
At each counter overflow and at each counter underflow in the center-aligned counting mode
CK_CNT
Up-Counting
CNTR
0 1
REPR
REPR Counter = 0
UEV1
Down-Counting
CNTR
3 2
REPR
REPR Counter = 0
UEV1
Center-Aligned-Counting
f
CLKIN
CNTR 2 3 4 3
REPR
REPR Counter = 1
UEV1

Figure 81. Update Event 1 Dependent Repetition Mechanism Example

Rev. 1.10
F2 F3 F4 4
F5
F5
Write a new value
2 3 4 5 0 1
REPR Counter = 1
1 0 3 2 1 0
REPR Counter = 2
2 1 0 1 2 3 4
REPR Counter = 0 REPR Counter = 1
295 of 590
3 2 1 0
4
4
Software clearing
2 3 4 5 0 1
1
REPR Counter = 0
3 2 1 0 3 2
2
REPR Counter = 1 REPR Counter = 0
3 2 1 0 1 2 3 4
1
REPR Counter = 0 REPR Counter = 1 REPR Counter = 0
1 2 3
Software clearing
2 3 4
1 0 3
3 2 1 0
November 28, 2018