Usb Endpoint 0 Control And Status Register - Usbep0Csr - Holtek HT32F12345 User Manual

32-bit microcontroller with arm cortex-m3 core
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32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
USB Endpoint 0 Control and Status Register – USBEP0CSR
This register specifies the Endpoint 0 control and status.
Offset:
0x014
Reset value: 0x0000_0002
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Reserved
Type/Reset
Bits
Field
Descriptions
[5]
STLRX
STALL Status for reception (OUT) transfer
This bit is set to 1 by the application software and then returns a STALL signal in the
handshake phase of an OUT transaction if a functional error is detected. This means
that a control request delivered from the USB host is not supported by the USB
device. The STALL status is cleared by the hardware circuitry when a SETUP token is
received.
This bit can be read and written and can only be toggled by writing 1.
[4]
NAKRX
NAK Status for reception (OUT) transfer
This bit is toggled from 0 to 1 by the hardware circuitry, which will result in a NAK
signal in the handshake phase of an OUT transaction after an ACK signal has been
transmitted. This means that the USB device will be temporarily unable to accept data
from the USB host. Therefore, more time will be required for the received data to be
properly processed.
This bit can be read and written and can only be toggled by writing 1.
[3]
DTGRX
Data Toggle Status for reception (OUT) transfer
This bit contains the expected value of the data toggle bit (0 = DATA0, 1 = DTAT1) for
the next data packet to be received. When the current valid data packet is received
and the corresponding ACK signal is sent to the USB host by the USB device, the
hardware circuitry will toggle this bit and the device will be ready to receive the next
data packet. For Endpoint 0, the hardware circuitry will toggle this bit to 1 after the
SETUP token is received as Endpoint 0 is addressed. This bit can also be toggled by
the software to initialize its value for certain applications.
This bit can be read and written and can only be toggled by writing 1.
[2]
STLTX
STALL Status for transmission (IN) transfer
This bit is set to 1 by the application software and then returns a STALL signal in
response to an IN token if a functional error is detected. This means that the USB
device is unable to transmit data. The STALL status is cleared by the hardware
circuitry when a SETUP token is received.
This bit can be read and written and can only be toggled by writing 1.
Rev. 1.10
30
29
28
22
21
20
14
13
12
6
5
4
STLRX
NAKRX
RW
0 RW
479 of 590
27
26
Reserved
19
18
Reserved
11
10
Reserved
3
2
DTGRX
STLTX
0 RW
0 RW
0 RW
25
24
17
16
9
8
1
0
NAKTX
DTGTX
1 RW
0
November 28, 2018

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