Fifo Control And Arrangement; Figure 203. I S-Justified Repeat Mode Waveforms; Figure 204. I S-Justified Repeat Mode Waveforms (32-Bit Channel Extended) - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
I 2 S-justified Repeat Mode
In the I 2 S-justified repeat mode, the Most Significant Bit (MSB) of the mono audio sample data is
available on the second rising edge of the BCLK clock following a WS signal transition. In this
mode the same data is transmitted twice, once when WS is low and again when WS is high. Figure
203 and Figure 204 show the I
BCLK
WS
SDO/SDI MSB
Figure 203. I 2 S-justified Repeat Mode Waveforms
BCLK
WS
SDO/SDI MSB
Sample size: 8, 16 or 24-bit
Figure 204. I 2 S-justified Repeat Mode Waveforms (32-bit Channel Extended)

FIFO Control and Arrangement

The I 2 S handles audio data for transmission and reception and is performed via the FIFO controller.
Each transmitted or received FIFO has a depth of 8 words (8 × 32-bit) and can buffer the data. The
format is dependent upon the stereo / mono mode and sample size setting. The detailed FIFO data
content format is shown in Figure 205. The FIFO controller consists of comparators which compare
the current FIFO levels with configurable depth settings. The current level of the TX or RX FIFO
status can be seen in the TXFS and RXFS fields of the I
Rev. 1.10
S-justified repeat mode format.
2
Mono Sample
Sample size: 8, 16, 24 or 32-bit
Mono Sample
LSB 0 forced or skipped
(32 - Sample size)
bits remaining
547 of 590
repeat sample or skipped
LSB MSB
repeat sample or skipped
MSB LSB
2 S status register (I2SSR).
LSB
0 forced
November 28, 2018