32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
PDMA Request
The EBI only supports using a software trigger for active PDMA service.
Register Map
The following table shows the EBI register and reset value.
Table 68. Register Map of EBI
Register
EBI Base Address = 0x4009_8000
EBICR
EBIPCR
EBISR
EBIATR0
EBIRTR0
EBIWTR0
EBIPR0
EBIATR1
EBIRTR1
EBIWTR1
EBIPR1
EBIATR2
EBIRTR2
EBIWTR2
EBIPR2
EBIATR3
EBIRTR3
EBIWTR3
EBIPR3
EBIIENR
EBIIFR
EBIIFCR
Rev. 1.10
Offset
0x000
EBI Control Register
0x004
EBI Page Control Register
0x008
EBI Status Register
0x010
EBI Address Timing Register 0
0x014
EBI Read Timing Register 0
0x018
EBI Write Timing Register 0
0x01C
EBI Parity Register 0
0x020
EBI Address Timing Register 1
0x024
EBI Read Timing Register 1
0x028
EBI Write Timing Register 1
0x02C
EBI Parity Register 1
0x030
EBI Address Timing Register 2
0x034
EBI Read Timing Register 2
0x038
EBI Write Timing Register 2
0x03C
EBI Parity Register 2
0x040
EBI Address Timing Register 3
0x044
EBI Read Timing Register 3
0x048
EBI Write Timing Register 3
0x04C
EBI Parity Register 3
0x050
EBI Interrupt Enable Register
0x054
EBI Interrupt Flag Register
0x058
EBI Interrupt Clear Register
527 of 590
Description
Reset Value
0x0000_0000
0x0000_0F00
0x0000_0010
0x0000_0F0F
0x000F_3F0F
0x000F_3F0F
0x0000_0000
0x0000_0F0F
0x000F_3F0F
0x000F_3F0F
0x0000_0000
0x0000_0F0F
0x000F_3F0F
0x000F_3F0F
0x0000_0000
0x0000_0F0F
0x000F_3F0F
0x000F_3F0F
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
November 28, 2018
Need help?
Do you have a question about the HT32F12345 and is the answer not in the manual?