32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
Channel Output Reference Signal
When the MCTM is used in the compare match output mode, the CHxOREF signal (Channel x
Output Reference signal) is defined by the CHxOM bit setup. The CHxOREF signal has several
types of output function which defines what happens to the output when the counter value matches
the contents of the CHxCCR register. In addition to the low, high and toggle CHxOREF output
types, there are also PWM mode 1 and PWM mode 2 outputs. In these modes, the CHxOREF
signal level is changed according to the count direction and the relationship between the counter
value and the CHxCCR content. There are also two modes which will force the output into an
inactive or active state irrespective of the CHxCCR content or counter values. With regard to a
more detailed description refer to the relative bit definition.
The accompanying table shows a summary of the output type setup.
Table 36. Compare Match Output Setup
CHxCCR
(New value 2)
CHxCCR
(New value 3)
CHxCCR
(New value 1)
CHxCCR
CHxCCR value
CHxOREF
(Update Event 1)
Figure 96. Toggle Mode Channel Output Reference Signal – CHxPRE = 0
Rev. 1.10
CHxOM value
0x00
No change
0x01
Clear Output to 0
0x02
Set Output to 1
0x03
Toggle Output
0x04
Force Inactive Level
0x05
Force Active Level
0x06
PWM Mode 1
0x07
PWM Mode 2
Counter Value
CHxOM=0x03, CHxPRE=0
(Output toggle, preload disable)
CRR
Update
(1)
(2)
TME
UEV1
305 of 590
Compare Match Level
Time
(3)
November 28, 2018
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