Holtek HT32F12345 User Manual page 501

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
Register
PDMACH1CTSR
PDMA Channel 2 Registers
PDMACH2CR
PDMACH2SADR
PDMACH2DADR
PDMACH2TSR
PDMACH2CTSR
PDMA Channel 3 Registers
PDMACH3CR
PDMACH3SADR
PDMACH3DADR
PDMACH3TSR
PDMACH3CTSR
PDMA Channel 4 Registers
PDMACH4CR
PDMACH4SADR
PDMACH4DADR
PDMACH4TSR
PDMACH4CTSR
PDMA Channel 5 Registers
PDMACH5CR
PDMACH5SADR
PDMACH5DADR
PDMACH5TSR
PDMACH5CTSR
PDMA Channel 6 Registers
PDMACH6CR
PDMACH6SADR
PDMACH6DADR
PDMACH6TSR
PDMACH6CTSR
PDMA Channel 7 Registers
PDMACH7CR
PDMACH7SADR
PDMACH7DADR
PDMACH7TSR
PDMACH7CTSR
PDMA Channel 8 Registers
PDMACH8CR
PDMACH8SADR
PDMACH8DADR
PDMACH8TSR
PDMACH8CTSR
PDMA Channel 9 Registers
PDMACH9CR
Rev. 1.10
Offset
0x02C PDMA Channel 1 Current Transfer Size Register 0x0000_0000
0x030 PDMA Channel 2 Control Register
0x034 PDMA Channel 2 Source Address Register
0x038 PDMA Channel 2 Destination Address Register
0x040 PDMA Channel 2 Transfer Size Register
0x044 PDMA Channel 2 Current Transfer Size Register 0x0000_0000
0x048 PDMA Channel 3 Control Register
0x04C PDMA Channel 3 Source Address Register
0x050 PDMA Channel 3 Destination Address Register
0x058 PDMA Channel 3 Transfer Size Register
0x05C PDMA Channel 3 Current Transfer Size Register 0x0000_0000
0x060 PDMA Channel 4 Control Register
0x064 PDMA Channel 4 Source Address Register
0x068 PDMA Channel 4 Destination Address Register
0x070 PDMA Channel 4 Transfer Size Register
0x074 PDMA Channel 4 Current Transfer Size Register 0x0000_0000
0x078 PDMA Channel 5 Control Register
0x07C PDMA Channel 5 Source Address Register
0x080 PDMA Channel 5 Destination Address Register
0x088 PDMA Channel 5 Transfer Size Register
0x08C PDMA Channel 5 Current Transfer Size Register 0x0000_0000
0x090 PDMA Channel 6 Control Register
0x094 PDMA Channel 6 Source Address Register
0x098 PDMA Channel 6 Destination Address Register
0x0A0 PDMA Channel 6 Transfer Size Register
0x0A4 PDMA Channel 6 Current Transfer Size Register 0x0000_0000
0x0A8 PDMA Channel 7 Control Register
0x0AC PDMA Channel 7 Source Address Register
0x0B0 PDMA Channel 7 Destination Address Register
0x0B8 PDMA Channel 7 Transfer Size Register
0x0BC PDMA Channel 7 Current Transfer Size Register 0x0000_0000
0x0C0 PDMA Channel 8 Control Register
0x0C4 PDMA Channel 8 Source Address Register
0x0C8 PDMA Channel 8 Destination Address Register
0x0D0 PDMA Channel 8 Transfer Size Register
0x0D4 PDMA Channel 8 Current Transfer Size Register 0x0000_0000
0x0D8 PDMA Channel 9 Control Register
501 of 590
Description Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
November 28, 2018