32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
Clearing the CHxOREF when ETIF is high
The CHxOREF signal can be forced to 0 when the ETIF signal is set to a high level by setting the
REFxCE bit to 1 in the CHxOCFR register. The CHxOREF signal will not return to its active level
until the next update event occurs.
Counter value
CHxCCR
Update Event
ETIF
(GTn_ETI)
CHxOREF
Figure 65. Clearing CHOxREF by ETIF
Rev. 1.10
CHxOREF is still low
Until the next Update Event occurs
243 of 590
Time
November 28, 2018
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