32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
Port D Open Drain Selection Register – PDODR
This register is used to enable or disable the GPIO Port D open drain function.
Offset:
0x010
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits
Field
[2:0]
PDODn
Port D Output Current Drive Selection Register – PDDRVR
This register specifies the GPIO Port D output driving current.
Offset:
0x014
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Reserved
Type/Reset
Bits
Field
[5:0]
PDDVn[1:0]
Rev. 1.10
30
29
28
22
21
20
14
13
12
6
5
Reserved
Descriptions
GPIO Port D pin n Open Drain Selection Control Bits (n = 0 ~ 2)
0: Pin n Open Drain output is disabled. (The output type is CMOS output)
1: Pin n Open Drain output is enabled. (The output type is open-drain output)
30
29
28
22
21
20
14
13
12
6
5
PDDV2
RW
0 RW
Descriptions
GPIO Port D pin n Output Current Drive Selection Control Bits (n = 0 ~ 2)
00: 4 mA source / sink current
01: 8 mA source / sink current
10: 12 mA source / sink current
11: 16 mA source / sink current
154 of 590
27
26
Reserved
19
18
Reserved
11
10
Reserved
4
3
2
RW
27
26
Reserved
19
18
Reserved
11
10
Reserved
4
3
2
PDDV1
0 RW
0 RW
25
24
17
16
9
8
1
0
PDOD
0 RW
0 RW
0
25
24
17
16
9
8
1
0
PDDV0
0 RW
0 RW
0
November 28, 2018
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