32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
Watchdog Timer Protection Register – WDTPR
This register specifies the Watchdog timer protect key configuration.
Offset:
0x010
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
RW
0 RW
7
Type/Reset
RW
0 RW
Bits
Field
[15:0]
PROTECT
Rev. 1.10
30
29
28
22
21
20
14
13
12
0 RW
0 RW
6
5
0 RW
0 RW
Descriptions
Watchdog Timer Register Protection
For write operation:
0x35CA: Disable the Watchdog timer register write protection
Others: Enable the Watchdog timer register write protection
For read operation:
0x0000: Watchdog timer register write protection is disabled
0x0001: Watchdog timer register write protection is enabled
This register is used to enable / disable the Watchdog timer configuration register
write protection function. All configuration registers become read only except for
WDTCR and WDTPR when the register write protection is enabled. Additionally, the
read operation of PROTECT [0] can obtain the enable / disable status of the register
write protection function.
382 of 590
27
26
Reserved
19
18
Reserved
11
10
PROTECT
0 RW
0 RW
4
3
2
PROTECT
0 RW
0 RW
25
24
17
16
9
8
0 RW
0 RW
0
1
0
0 RW
0 RW
0
November 28, 2018
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