Usb Endpoint 4 ~ 7 Interrupt Status Register - Usbepnisr, N = 4 ~ 7 - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
Bits Field Descriptions
[2] ODOVIE OUT Data Buffer Overrun Interrupt Enable Control
[1] ODRXIE OUT Data Received Interrupt Enable Control
[0] OTRXIE OUT Token Received Interrupt Enable Control
USB Endpoint 4 ~ 7 Interrupt Status Register – USBEPnISR, n = 4 ~ 7
This register specifies the Endpoint 4 ~ 7 interrupt status.
Offset: 0x06C (n = 4), 0x080 (n = 5), 0x094 (n = 6), 0x0A8 (n = 7)
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
UERIF
Type/Reset WC 0 WC
Bits Field Descriptions
[7] UERIF USB Error Interrupt flag
This bit is set by the hardware circuitry when an error occurs during the transaction.
Writing 1 into this status bit will clear it to 0.
[6] STLIF STALL Transmitted Interrupt flag
This bit is set by the hardware circuitry when a STALL-token is sent in response to an
IN or OUT token and is cleared to 0 by writing 1.
[5] NAKIF NAK Transmitted Interrupt flag
This bit is set by the hardware circuitry when a NAK-token is sent in response to an
IN or OUT token and is cleared to 0 by writing 1.
[4] IDTXIF IN Data Transmitted Interrupt flag
This bit is set by the hardware circuitry when a data packet is successfully transmitted
to the host in response to an IN-token and an ACK-token is received.
Writing 1 into this status bit will clear it to 0.
[3] ITRXIF IN Token Received Interrupt flag
This bit is set by the hardware circuitry when the endpoint receives an IN token from
the host and is cleared to 0 by writing 1.
Rev. 1.10
0: Disable interrupt
1: Enable interrupt
0: Disable interrupt
1: Enable interrupt
0: Disable interrupt
1: Enable interrupt
30 29 28
22 21 20
14 13 12
6 5 4
STLIF NAKIF IDTXIF
0 WC 0 WC
493 of 590
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
ITRXIF ODOVIF
0 WC 0 WC 0 WC
25 24
17 16
9 8
1 0
ODRXIF OTRXIF
0 WC 0
November 28, 2018