Usart Synchronous Control Register - Syncr - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
USART Synchronous Control Register – SYNCR
This register is used to control the USART synchronous mode.
Offset : 0x020
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[3] CPO
[2] CPS
[0] CLKEN
Rev. 1.10
30 29 28
22 21 20
14 13 12
6 5 4
Reserved
Descriptions
Clock Polarity
0: CTS/SCK pin idle state is low
1: CTS/SCK pin idle state is high
Selects the polarity of the clock output on the USART CTS/SCK pin in the
synchronous mode. Works in conjunction with the CPS bit to specify the desired
clock idle state.
Clock Phase
0: Data is captured on the first clock edge
1: Data is captured on the second clock edge
This bit allows the user to select the phase of the clock output on the USART
CTS/SCK pin in the synchronous mode. Works in conjunction with the CPO bit to
determine the data capture edge.
Clock Enable
0: CTS/SCK pin disabled
1: CTS/SCK pin enabled
Enable / disable the USART CTS/SCK pin.
452 of 590
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
CPO CPS Reserved
RW 0 RW 0
25 24
17 16
9 8
1 0
CLKEN
RW 0
November 28, 2018