Register Descriptions; Rtc Counter Register - Rtccnt - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345

Register Descriptions

RTC Counter Register – RTCCNT
This register defines a 32-bit up counter which is incremented by the CK_SECOND clock.
Offset: 0x000
Reset value: 0x0000_0000
31
Type/Reset RO 0 RO
23
Type/Reset RO 0 RO
15
Type/Reset RO 0 RO
7
Type/Reset RO 0 RO
Bits Field
[31:0] RTCCNTV
Rev. 1.10
30 29 28
0 RO 0 RO
22 21 20
0 RO 0 RO
14 13 12
0 RO 0 RO
6 5
0 RO 0 RO
Descriptions
RTC Counter Value
The current value of the RTC counter is returned when reading the RTCCNT
register. The RTCCNT register is updated during the falling edge of the CK_
SECOND. This register is reset by one of the following conditions:
– Backup Domain software reset – Set the BAKRST bit in the BAKCR register
– Backup Domain power on reset – PORB
– Compare match (RTCCNT = RTCCMP) when CMPCLR = 1 (In the RTCCR register)
– RTCEN bit changed from 0 to 1
369 of 590
27 26
RTCCNTV
0 RO 0 RO
19 18
RTCCNTV
0 RO 0 RO
11 10
RTCCNTV
0 RO 0 RO
4 3 2
RTCCNTV
0 RO 0 RO
25 24
0 RO 0 RO 0
17 16
0 RO 0 RO 0
9 8
0 RO 0 RO 0
1 0
0 RO 0 RO 0
November 28, 2018