32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
Since the internal AHB address (HADDR) is a byte (8-bit) address whereas the 16-bit width of
external device is addressed in words (16-bit), the address actually issued to the external device
varies according to the data width as shown in the following table.
In case of a 16-bit external device width, the EBI will internally use HADDR [N+1:1] to generate
the address EBI_A [N:0] for external device. Whatever the external memory width (16-bit or 8-bit),
EBI_A[0] should be connected to external device address A[0].
Multiplexed 16-bit Data, 16-bit Address Mode
In this mode, 16-bit address and 16-bit data is supported, but the utilization of an external latch and
an extra signal EBI_ALE is required. The 16-bit address and 16-bit data bits are multiplexed on
the EBI_AD pins. An EBI address latch setup diagram is shown in Figure 175. This mode is set by
programming the MODE field in the EBICR register to D16A16ALE.
EBI
Figure 175. An EBI Address Latch Setup Diagram
At the start of the transaction the address is output on the EBI_AD lines. The external address
latch is controlled by the EBI_ALE signal and stores the address. Then the data is read or written
according to operation. Read and write signals are shown in Figure 176 and Figure 177.
EBI_AD[15:0]
EBI_ALE
EBI_CSn
EBI_OE
Figure 176. EBI Multiplexed 16-bit Data, 16-bit Address Read Operation
Rev. 1.10
Memory width
Data address issued to the EBI
8-bit
HADDR[N:0] → EBI_A[N:0]
16-bit
HADDR[N+1:1] → EBI_A[N:0]
EBI_AD
Latch
EBI_ALE
ADDRSETUP
RDSETUP
(1, 2, 3, ...)
(0, 1, 2, ...)
ADDR[16:1]
518 of 590
Address
External
Asynchronous
Device
Data
Control
RDSTRB
RDHOLD
(1, 2, 3, ...)
(0, 1, 2, ...)
DATA[15:0]
November 28, 2018
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