Trigger Adc Start; Lock Level Table; Table 39. Lock Level Table - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345

Trigger ADC Start

To interconnect to the Analog-to-Digital Converter, the MCTM can output the MTO signal or the
channel compare match output signal CHxOREF (x = 0 ~ 3) to be used as an Analog-to-Digital
Converter input trigger signal.

Lock Level Table

In addition to the break input and output management, a write protection has been internally
implemented in the break circuitry to safeguard the application. Users can choose one protection
level selected by the LOCKLV bits to protect the relative control bits of the registers. The LOCKLV
bits can only be written once after an MCTM or system reset. Then the protected bits will be
locked and can not be changed anymore except by the MCTM reset or when the system is reset.

Table 39. Lock Level Table

Lock
Configuration
Lock Level 1
(LOCKLV = '01')
Lock Level 2
(LOCKLV = '10')
Lock Level 3
(LOCKLV = '11')
Notes: 1. The MCTMEN bit of the APBCCR1 register is located in the CKCU unit and use to control
the clock source of the MCTM unit.
2. The CKMEN bit of the GCCR register is located in the CKCU unit and use to monitor the
high speed external clock (HSE) source. If the CKMEN bit is enabled and when hardware
detects HSE clock stuck at low / high state, internal hardware will automatically switch the
system clock to internal high speed RC clock (HSI) to protect the system safety.
3. When the MCTMEN and CKMEN control bits of the CKCU lock protection mode is enabled
in the MCTM unit, the bits will be allowed to enable only and inhibited to disable again.
Rev. 1.10
CHDTG CHxOIS CHxOISN
CHDTG CHxOIS CHxOISN
CHxP CHxNP CHOSSI
CHDTG CHxOIS CHxOISN
CHxP CHxNP CHOSSI
CHxPRE CHxOM
324 of 590
Protected
Bits
BKE BKP
BKE BKP
CHOSSR MCTMEN
BKE BKP
CHOSSR MCTMEN
November 28, 2018
CHAOE
CHAOE
(1) CKMEN (2)
CHAOE
(1) CKMEN (2)