Figure 56. Toggle Mode Channel Output Reference Signal (Chxpre = 0) - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
Channel Output Reference Signal
When the GPTM is used in the compare match output mode, the CHxOREF signal (Channel x
Output Reference signal) is defined by setting the CHxOM bits. The CHxOREF signal has several
types of output function. These include, keeping the original level by setting the CHxOM field to
0x00, set to 0 by setting the CHxOM field to 0x01, set to 1 by setting the CHxOM field to 0x02 or
signal toggle by setting the CHxOM field to 0x03 when the counter value matches the content of
the CHxCCR register.
The PWM mode 1 and PWM mode 2 outputs are also another kind of CHxOREF output which is
setup by setting the CHxOM field to 0x06 / 0x07. In these modes, the CHxOREF signal level is
changed according to the counting direction and the relationship between the counter value and the
CHxCCR content. With regard to a more detailed description refer to the relative bit definition.
Another special function of the CHxOREF signal is a forced output which can be achieved by
setting the CHxOM field to 0x04 / 0x05. Here the output can be forced to an inactive/active level
irrespective of the comparison condition between the counter and the CHxCCR values.
(New value 2)
(New value 3)
(New value 1)
Update CHxCCR
(Update Event)

Figure 56. Toggle Mode Channel Output Reference Signal (CHxPRE = 0)

Rev. 1.10
Counter Value
CHxOM=0x03, CHxPRE=0
(Output toggle, preload disable)
CRR
CHxCCR
CHxCCR
CHxCCR
CHxCCR
value (1)
TME
CHxOREF
UEV
237 of 590
Time
(2) (3)
November 28, 2018