Adc Input Sampling Time Register N - Adcstrn, N = 0 ~ 11; Adc Regular Conversion Data Register Y - Adcdry, Y = 0 ~ 11 - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
ADC Input Sampling Time Register n – ADCSTRn, n = 0 ~ 11
This register specifies the sampling time of ADC channel n.
Offset: 0x070 ~ 0x09C
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset RW 0 RW
Bits Field
[7:0] ADSTn
ADC Regular Conversion Data Register y – ADCDRy, y = 0 ~ 11
This register specifies the regular conversion data of ADC sequence order ADSEQy in the ADCLSTn (n = 0 ~ 2) registers.
Offset: 0x0B0 ~ 0x0DC
Reset value: 0x0000_0000
31
ADVLDy
Type/Reset RC 0
23
Type/Reset
15
Type/Reset RO 0 RO
7
Type/Reset RO 0 RO
Bits Field
[31] ADVLDy
[15:0] ADDy
Rev. 1.10
30 29 28
22 21 20
14 13 12
6 5 4
0 RW 0 RW
Descriptions
ADC Input Channel n Sampling Time (n = 0 ~ 11)
Sampling time = (STn [7:0] + 1.5) ADC clocks.
30 29 28
22 21 20
14 13 12
0 RO 0 RO
6 5
0 RO 0 RO
Descriptions
ADC Regular Conversion Data of Sequence Order Valid Bit (y = 0 ~ 11)
0: Data are invalid or have been read
1: New data are valid
ADC Regular Conversion Data of Sequence Order (y = 0 ~ 11)
The regular conversion result of sequence order in ADCLSTn registers (n = 0 ~ 2)
201 of 590
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
ADSTn
0 RW 0 RW
27 26
Reserved
19 18
Reserved
11 10
ADDy
0 RO 0 RO
4 3 2
ADDy
0 RO 0 RO
25 24
17 16
9 8
1 0
0 RW 0 RW 0
25 24
17 16
9 8
0 RO 0 RO 0
1 0
0 RO 0 RO 0
November 28, 2018