Holtek HT32F12345 User Manual page 31

32-bit microcontroller with arm cortex-m3 core
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32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
Supports byte, half-word and word data size
Programmable CRC initial seed value
CRC computation done in 1 AHB clock cycle for 8-bit data and 4 AHB clock cycles for 32-bit
data
Supports PDMA to complete a CRC computation of a block of memory
Peripheral Direct Memory Access – PDMA
12 channels with trigger source grouping
8/16/32-bit width data transfer
Supports Address increment, decrement or fixed mode
4-level programmable channel priority
Auto reload mode
Supported trigger source: ADC, SPI, EBI, CRC, USART, UART, I
SDIO and software request
External Bus Interface – EBI
Programmable interface for various memory types
Translates the AHB transactions into the appropriate external device protocol
4 Memory bank regions and independent chip select control for each memory bank
Accurate control of setup, strobe, hold and turn-around timing per memory bank
Supports page mode read
Automatic translation when AHB transaction width and external memory interface width is
different
Write buffer to decrease the stalling of the AHB write burst transaction
Both multiplexed and non-multiplexed address and data line configurations
– Up to 21 address lines
– Up to 16-bit data bus width
Universal Serial Bus Device Controller – USB
Complies with USB 2.0 full-speed (12 Mbps) specification
On-chip USB full-speed transceiver
1 control endpoint (EP0) for control transfer
3 single-buffered endpoint (EP1 ~ EP3) for bulk and interrupt transfer
4 double-buffered endpoint (EP4 ~ EP7) for bulk, interrupt and isochronous transfer
1 KB EP_SRAM used as the endpoint data buffers
Secure Digital Input Output Interface – SDIO
Supports two different data bus modes: 1-bit (default) and 4-bit
Supports two different speed modes: Normal speed (default) and High speed
SD clock frequency of up to 48 MHz
SPI mode and MMC stream mode not supported
Debug support
Serial Wire Debug Port SW-DP
6 instruction comparator and 2 literal comparator for hardware breakpoint/watchpoint or code
patch
1-bit asynchronous trace (TRACESWO)
Package and Operation Temperature
46-pin QFN, 48/64-pin LQFP package
Operation temperature range: -40 ºC to 85 ºC
Rev. 1.10
31 of 590
C, I
S, GPTM, MCTM,
2
2
November 28, 2018

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