32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
19
Inter-Integrated Circuit (I
Introduction
The I
2
C Module is an internal circuit allowing communication with an external I
is an industry standard two line serial interface used for connection to external hardware. These
two serial lines are known as a serial data line, SDA, and a serial clock line, SCL. The I
provides three data transfer rates: 100 kHz in the Standard mode, 400 kHz in the Fast mode and 1
MHz in the Fast-mode plus. The SCL period generation register is used to setup different kinds of
duty cycle implementation for the SCL pulse.
The SDA line which is connected to the whole I
master and slave devices used for the transmission and reception of data. The I
an arbitration detection function to prevent the situation where more than one master attempts to
transmit data on the I
APB Bus
Control Register
SCL High/Low
Generation
Target Register
Data Shift Register
Address
Register
Status
Register
Figure 126. I
2
C Module Block Diagram
Rev. 1.10
2
C bus at the same time.
Interrupts
SCL
period
Generator
Address/Data
Data Register
Address
Comparator
Arbitration
Bus Status
384 of 590
C)
2
2
C bus is a bi-directional data line between the
Bit
Counter
SCL out
control
SCL Sync
SDA out
control
Sync
SCL Edge
Detect
2
C interface which
C module
2
C module also has
2
SCL_out
SDA_out
SDA_in
SCL_in
November 28, 2018
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