Page Read Operation; Figure 179. Ebi Multiplexed 8-Bit Data, 24-Bit Address Write Operation - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
EBI_AD[15:8]
EBI_AD[7:0]
EBI_ALE
EBI_CSn
EBI_WE

Figure 179. EBI Multiplexed 8-bit Data, 24-bit Address Write Operation

Page Read Operation

Page mode read operation is a performance-enhancing extension to the legacy asynchronous read
transactions. In page-mode-capable devices, an initial asynchronous read access is preformed
and then adjacent addresses can be read quickly by simply changing the low-order address. For
example, Addresses A [3:0] are used to determine the members of the 16-address page mode
device. Any change in addresses A [4] or higher will stop the page read and initiate a new
asynchronous read access time. Page mode takes advantage of the fact that adjacent addresses can
be read faster than random addresses.
Page mode operation is enabled by setting the PAGEMODE bit in the EBIRTRn register to 1. If
enabled, the RDPG field in the EBIPCR register defines the duration of an intra-page access and
the PAGELEN field in the EBIPCR register defines the number of addresses members in a page.
The INCHIT bit of the EBIPCR register defines whether page hits occur on any addresses member
in a page or only on incremental addresses. Page mode reads can be triggered by consecutive reads
resulting from wide AHB reads which are automatically translated into multiple narrow external
device reads. The following figures show typical page mode read sequences for all addressing
modes.
Rev. 1.10
ADDRSETUP ADDRHOLD WESETUP
(1, 2, 3, ...) (0, 1, 2, ...) (0, 1, 2, ...)
ADDR[23:16]
ADDR[15:8]
520 of 590
WESTRB WEHOLD
(1, 2, 3, ...) (0, 1, 2, ...)
ADDR[7:0]
DATA[7:0]
November 28, 2018