32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
16
Motor Control Timer (MCTM)
Introduction
The Motor Control Timer consists of one 16-bit up/down-counter, four 16-bit Capture / Compare
Registers (CCRs), one 16-bit Counter-Reload Register (CRR), one 8-bit Repetition Counter (REPR)
and several control / status registers. It can be used for a variety of purposes which include general
time measurement, input signal pulse width measurement, output waveform generation for signals
such as single pulse generation or PWM generation, including dead time insertion. The MCTM
supports an encoder interface using a quadrature decoder with two inputs.
ITI0
ITI1
Trigger Controller
ITI2
MTn_CH0
MTn_CH1
Input Stage Block
MTn_CH2
MTn_CH3
MTn_ETI
MTn_BRK1
MTn_ETI
MTn_BRK0
MTn_BRK
UEV1 : Update Event 1
CEVx : Channel x Capture Event
UEV2 : Update Event 2
Figure 77. MCTM Block Diagram
Rev. 1.10
TME
STI
Slave Controller
STIED
f
sampling
UP_CNT
Clock Controller
Quadrature Decoder
DOWN_CNT
f
CLKIN
CEV0
CH0PSC
CEV1
CH1PSC
CEV2
Channel Controller
CH2PSC
CEV3
CH3PSC
f
sampling
BEV : Break Event
291 of 590
UEV1G
TEV
UEV2
f
CLKIN
start/stop/reset
Master Controller
UEV1
f
CLKIN
TM_CNT
CH0CCR
CH1CCR
Output Stage Block
CH2CCR
CH3CCR
f
f
CLKIN
DTS
BEV
CKFAIL
MEVx : Channel x Compare Match Event
TEV : Trigger Event
MTO
fCLKIN
MEVx
MTn_CH0O
MTn_CH0NO
MTn_CH1O
MTn_CH1NO
MTn_CH2O
MTn_CH2NO
MTn_CH3O
/ f
CLKIN
November 28, 2018
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