32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
Bits
Field
[16]
SOFLCK
[10:0]
FRNUM
USB Device Address Register – USBDEVAR
This register specifies the USB device address.
Offset:
0x010
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Reserved
Type/Reset
RW
Bits
Field
Descriptions
[6:0]
DEVA
Device Address
This field is used to specify the USB device address. This field is cleared when a USB
reset event occurs.
Rev. 1.10
Descriptions
Start-of-Frame Lock Flag
This bit is set by the hardware when SOF packets have been received before the
frame timer times out. Once this flag is set to 1, the frame number which is sent
from the USB host will be loaded into the Frame Number field in the USBFCR
register. If there no SOF packet has been received during the 1 ms frame time
duration, this bit will be cleared to 0.
Frame Number
This field stores the frame number received from the USB host.
30
29
28
22
21
20
14
13
12
6
5
4
0 RW
0 RW
478 of 590
27
26
Reserved
19
18
Reserved
11
10
Reserved
3
2
DEVA
0 RW
0 RW
0 RW
25
24
17
16
9
8
1
0
0 RW
0
November 28, 2018
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