I 2 C Address Register - I2Caddr; I 2 C Status Register - I2Csr - Holtek HT32F12345 User Manual

32-Bit Arm ® Cortex ® -M3 MCU
HT32F12345
I 2 C Address Register – I2CADDR
This register specifies the I 2 C device address.
Offset: 0x008
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset RW 0 RW
Bits Field
[9:0] ADDR
I 2 C Status Register – I2CSR
This register contains the I 2 C operation status.
Offset: 0x00C
Reset value: 0x0000_0000
31
Type/Reset
23
Reserved
Type/Reset
15
Type/Reset
7
Type/Reset
Rev. 1.10
30 29 28
22 21 20
14 13 12
Reserved
6 5 4
0 RW 0 RW
Descriptions
Device Address
The register indicates the I 2
7-bit addressing mode, only the ADDR [6:0] bits will be compared with the received
address sent from the I 2 C master device.
30 29 28
22 21 20
TXNRX MASTER BUSBUSY
RO 0 RO
14 13 12
Reserved
6 5 4
Reserved
402 of 590
27 26
Reserved
19 18
Reserved
11 10
3 2
ADDR
0 RW 0 RW
C device address. When the I
27 26
Reserved
19 18
RXBF
0 RO 0 RO
11 10
TOUTF BUSERR
WC 0 WC
3 2
GCS ADRS
RC 0 RC
25 24
17 16
9 8
ADDR
RW 0 RW 0
1 0
0 RW 0 RW 0
2 C device is used in the
25 24
17 16
TXDE RXDNE
0 RO 0 RO 0
9 8
RXNACK ARBLOS
0 WC 0 WC 0
1 0
STO STA
0 RC 0 RC 0
November 28, 2018