32-Bit Arm
®
Cortex
®
-M3 MCU
HT32F12345
ADC Regular Trigger Source Register
This register contains the trigger source selection and the software trigger bit of the regular conversion.
Offset:
0x104
Reset value: 0x0000_0000
31
Type/Reset
23
Reserved
Type/Reset
15
Type/Reset
7
Type/Reset
Bits
Field
[26:24]
TME
[20]
CMPS
[19]
BFTMS
[18:16]
TMS
[11:8]
ADEXTIS
[0]
ADSC
Rev. 1.10
30
29
28
Reserved
22
21
20
CMPS
RW
14
13
12
Reserved
6
5
4
Reserved
Descriptions
GPTM or MCTM Trigger Event Selection of ADC Regular Conversion
000: GPTM or MCTM MTO event
001: GPTM or MCTM CH0O event
010: GPTM or MCTM CH1O event
011: GPTM or MCTM CH2O event
100: GPTM or MCTM CH3O event
Others: Reserved – Should not be used to avoid unpredictable results.
CMP Trigger Timer Selection of ADC Regular Conversion
0: CMP0
1: CMP1
BFTM Trigger Timer Selection of ADC Regular Conversion
0: BFTM0
1: BFTM1
GPTM or MCTM Trigger Timer Selection of ADC Regular Conversion
000: MCTM0
001: MCTM1
010: GPTM0
011: GPTM1
Others: Reserved – Should not be used to avoid unpredictable results.
EXTI Trigger Source Selection of ADC Regular Conversion
0x00: EXTI line 0
0x01: EXTI line 1
...
0x0F: EXTI line 15
ADC Regular Conversion Software Trigger Bit
0: Reset
1: Start regular conversion immediately
Set by software to start regular conversion manually. Clear by hardware after
conversion started.
204 of 590
–
ADCTSR
27
26
RW
0 RW
19
18
BFTMS
0 RW
0 RW
0 RW
11
10
RW
0 RW
0 RW
3
2
25
24
TME
0 RW
0
17
16
TMS
0 RW
0
9
8
ADEXTIS
0 RW
0
1
0
ADSC
RW
0
November 28, 2018
Need help?
Do you have a question about the HT32F12345 and is the answer not in the manual?