Appendix D Pin States - Renesas F-ZTAT H8 Series Hardware Manual

D.1 Port States in Each Mode
Table D.1 Port States
Pin Name Mode
φ
—
RESO * 2
—
P1 to P1 1 to 4
7 0
5, 6
7
P2 to P2 1 to 4
7 0
5, 6
7
P3 to P3 1 to 6
7 0
7
P4 to P4 1 to 6
7 0
7
P5 to P5 1 to 4
3 0
5, 6
7

Appendix D Pin States

Reset
Clock output T
2
T *
L
T
T
L
T
T
T
T
8-bit T
bus
16-bit T
bus
T
L
T
T
Hardware Software
Standby Standby
Mode Mode
H
T T
T T
T keep
T
T keep
T T
T keep
T
T keep
T T
T keep
T keep
T T
T keep
T T
T keep
T
T keep
Rev. 7.00 Sep 21, 2005 page 869 of 878
Appendix D Pin States
Bus- Program
Released Execution,
Mode Sleep Mode
Clock output Clock output
T RESO
T A to A
7 0
T Input port
(DDR = 0)
T A to A
7 0
(DDR = 1)
— I/O port
T A to A
15
T Input port
(DDR = 0)
T A to A
15
(DDR = 1)
— I/O port
T D to D
15
— I/O port
keep I/O port
T D to D
7
— I/O port
T A to A
19
T Input port
(DDR = 0)
T A to A
19
(DDR = 1)
— I/O port
REJ09B0259-0700
8
8
8
0
16
16