Operation Of Internal Clock Mode (Reload Mode) - Fujitsu MB90335 Series Hardware Manual

16-bit microcontroller
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MB90335 Series
14.3.2

Operation of Internal Clock Mode (Reload Mode)

It is synchronized with the internal count clock, the 16-bit counter performs the count
down, and the counter underflow generates the CPU interrupt request. Also can output
toggle waveforms from the timer output pin.
■ Operation of Internal Clock Mode (Reload Mode)
When the count operation is permitted (CNTE = 1 for TMCSR0) and the timer is started by the software
trigger bit (TRG of TMCSR0) or an external trigger, the reload register (TMRLR0) value is loaded to the
counter and the counter operation is started.
When the counter permission bit and the software trigger bit are simultaneously set to "1", the count
operation starts at the same time of the counter permission. When the counter value underflows ("0000
"FFFF
"), the 16-bit reload register (TMRLR0) value is loaded to the counter and the count operation is
H
continued. At this moment, if the underflow interrupt request flag bit (UF) is set to "1" and the interrupt
request permission bit (INTE) is set to "1", the interrupt request occurs. In addition, the toggle waveform
which reverses at every underflow can be output from the TOT0 pin.
Operation of Software trigger
When "1" is written to TRG bit of timer control status register (TMCSR0), the counter is started.
Figure 14.3-4 shows the software trigger operation at reloading.
Figure 14.3-4 Count Operation (Software Trigger Operation) in the Reload Mode
Count clock
Counter
Data load
signal
UF bit
CNTE bit
TRG bit
TOT0 pin
T: Machine cycle
CM44-10137-6E
−1
Reload
Reload
0000
H
data
data
T*
*: It takes 1T time from trigger input to loading of reload data.
FUJITSU MICROELECTRONICS LIMITED
CHAPTER 14 16-BIT RELOAD TIMER
14.3 Movement of 16-bit Reload Timer
−1
−1
Reload
0000
H
data
−1
Reload
0000
H
data
"→
H
331

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