Operations Of Internal Clock Mode (Reload Mode) - Fujitsu F2MC-16LX Hardware Manual

16.3.2 Operations of Internal Clock Mode (Reload Mode)

The counter operates in sync with the internal count clock to count down the 16-bit
counter and generate an interrupt request in case of counter underflow. The counter
also outputs a toggle waveform from the timer output pin.
I Operations of internal clock mode (reload mode)
If, with count operation enabled (TMCSR: CNTE = 1), the software trigger bit (TMCSR: TRG) or
external trigger is set to start the timer, the value in the reload register (TMRLR) is loaded into
the counter, and counter operation starts.
If both the counter enabled bit and the software trigger bit become "1" at the same time,
counting will start as soon as counter operation is enabled. If the counter value causes an
underflow(0000
counter to continue with the counting operation. At this time, the underflow interrupt request flag
bit (UF) is set to "1", and if the interrupt request enable bit (INTE) is set to "1", an interrupt
request is generated. It is also possible to output a toggle waveform that is inverted at every
underflow via the TOT pin.
❍ Software trigger operation
With the TRG bit of the timer control status register (TMCSR) set to "1", the counter starts.
Figure 16.3-4 "Count operation in reload mode (software trigger operation)" shows the software
trigger operation for a reload.
Figure 16.3-4 Count operation in reload mode (software trigger operation)
Count clock
Counter
Data load signal
UF bit
CNTE bit
TRG bit
TOT pin
T : Machine cycle * : The time from trigger input to loading the reload data is 1T.
--> FFFF ), the value in the 16-bit reload register (TMRLR) is loaded into the
H H
Reload Reload
-1
0000
H
data data
*
T
CHAPTER 16 16-BIT RELOAD TIMER
Reload
-1 -1
0000
H
data
Reload
-1
0000
H
data
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