Master/Slave Operation; Initialization; Clock Phase Synchronization; Matching Of Short-Command Counts (As Of Version Dll 523, Out 524) - Scanlab RTC 5 PC Interface Board Installation And Operation Manual

6.6.3 Master/Slave Operation

If multiple synchronously-clocked RTC
to be used in a PC, then the RTC
be connected pairwise with each other via the
MASTER and SLAVE connectors and then installed in
adjacent PCI slots. Always connect a board's MASTER
connector to the SLAVE connector of another board.
Suitable connection cables are available from
SCANLAB.
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An RTC 5 board automatically gets the master board
of a master/slave chain if a further RTC
connected to its MASTER connector but no further
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RTC 5 board is connected to its SLAVE connector. All
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other RTC 5 boards automatically get slave boards.
get_master_slave can be used to query separately
for each board the master/slave status, i.e. whether
the board is operated as a master, slave or single
board.

Initialization

The commands load_program_file
load_correction_file must be executed on all RTC
boards of a master/slave chain. The synchronous
timing with stable phase position of a master/slave
chain is severed by the first not-initialized board. If an
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RTC 5 board is initialized via
connected as slave to a board, then it is subject to its
own clock with an arbitrary phase position.

Clock Phase Synchronization

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If the RTC 5 boards of a master/slave chain shall be
synchronously clocked with a defined relative clock
phase, then the boards must be correspondingly
synchronized via the command sync_slaves.
Therefore, it's only necessary to send the command
sync_slaves (one-time) to the master board.
SCANLAB recommends performing the synchroni-
zation immediately after all boards have been
initialized (via load_program_file
load_correction_file). It is sufficient to call
load_correction_file(0,1,2) or to temporarily detach
all scan heads.
After synchronization, the clock phase of each slave
board is (reproduceably) delayed by approx. 0.16 µs
in relation to the clock phase of the preceding
(upstream) board. Without synchronization, delays
of up to 10 µs can occur. You can use
get_sync_status to check if a slave board is synchro-
nized to the master board (or to the preceding board
in the master/slave chain).
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RTC 5 PC Interface Board
Rev. 1.9 e
6 Developing User Applications
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5 boards are
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5 boards must first
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5 board is
and
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5
load_program_file but
and
Notes
• The master board doesn't pass the encoder
signals to the slave board(s). They must always be
individually supplied to the slave board(s). Here,
you'll need to take into account the 0.16 µs clock
phase shift.
Matching of Short-Command Counts (as of
Version DLL 523, OUT 524)
The maximum allowed number of directly consec-
utive short list commands within a 10 µs clock period
depends on the DSP version. To ensure that short list
commands execute synchronously even when using
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multiple RTC 5 boards with differing DSP versions in
a master/slave chain, the sync_slaves
sent to the master board) reduces the short list count
on all faster boards in the master/slave chain to equal
that of the slowest board (i.e. the board with the
lowest DSP version number).
Notes
• The CPU clock frequency isn't altered, only the
count of short list commands.
• You can also use the set_dsp_mode
make appropriate individual adjustments for each
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RTC 5 board.
• But note that some commands (e.g.
mark_ellipse_abs) are only available on boards
with higher-numbered DSP versions. Adjusting
the short-command count doesn't change this
fact. To ensure that the master/slave chain
remains synchronized, only use commands that
are available even for the board with the lowest
DSP version number.

Synchronous Starts and Stops

Within a master/slave chain, external list starts (if
enabled with set_control_mode) and external list
stops will be passed on from one board to all down-
stream slave boards. Therefore, a synchronous list
start of all boards (with presettable track delays) can
be induced by an external start signal, a
simulate_ext_start simulate_ext_start_ctrl
or a
the master board; and a synchronous list stop of all
boards can be induced by an external stop signal or
a simulate_ext_stop at the master board.
In contrast, list starts via execute_list
execute_at_pointer as well as list stops via
stop_execution will not be passed on. They must be
separately executed even at master/slave-synchro-
nized boards.
command (if
command to
at
or
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