Scanlab RTC 5 PC Interface Board Installation And Operation Manual page 602

PCI-Express
Legend
Master . . . . . . 6-pin MASTER connector (see
JP1 . . . . . . . . . Jumper for selecting the output signal level at the MULTI connector (see
JP2 - JP8 . . . . . Jumpers for configuring Pin B40 and B42 of the MULTI connector (see
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Layout of the RTC 5 PCIe/104 board (back side)
17.2.2 Interface to the CPU board
Data transfer between the CPU board and the
®
RTC 5 PCIe/104 board is via the PCI-Express bus. The
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RTC 5 PCIe/104 board provides 156-pin PCIe/104
connectors (see figure 71 on page
and signal levels of the PCI signals are in compliance
with PCI-Express Base Specification Revision 2.0 and
with PCI Local Bus Specification Revision 2.3.
Caution!
®
• The RTC 5 PCIe/104 board does not support
power-saving modes that switch off power to
the PCI bus. Accordingly, you must disable
standby or sleep modes of the operating
system. Also see the note on
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RTC 5 PC Interface Board
Rev. 1.9 e
®
17 Appendix C: The RTC 5 PCIe/104 Board
JP7 JP5
JP8 JP6
JP4 JP3
JP2
JP1
"Master/Slave Synchronization", page
17.2.3 Master/Slave Synchronization
If multiple synchronously-clocked RTC
boards are to be used in a PCIe/104 stack, then the
RTC
601). The timing with each other via the MASTER and SLAVE
connectors and installed in adjacent stack positions.
Always connect a board's MASTER connector to the
SLAVE connector of another board. Suitable
connection cables are available from SCANLAB.
Also see
page 84
Control Signals and Master/Slave Synchronization",
page
page 27.
1
MASTER
602)
®
5 PCIe/104 boards must be connected pairwise
chapter 6.6.3 "Master/Slave Operation",
and "Starting and Stopping Lists via External
209.
page 586)
page 586)
72
®
5 PCIe/104
602