ABB Relion 650 Series Technical Manual page 378

Section 12
Logic
ModeOutput1
Input 1
ModeOutput2
Input 17
ModeOutput3
ANSI10000055 V1 EN-US
Figure 204: Trip matrix internal logic
Output signals from TMAGGIO are typically connected to other logic blocks or directly to output
contacts in the IED. When used for direct tripping of the circuit breaker(s) the pulse time delay
shall be set to approximately 0.150 seconds in order to obtain satisfactory minimum duration of
the trip pulse to the circuit breaker trip coils.
12.4 Configurable logic blocks
12.4.1 Standard configurable logic blocks
12.4.1.1 Functionality
A number of logic blocks and timers are available for the user to adapt the configuration to the
specific application needs.
• OR function block.
• INVERTER function blocks that inverts the input signal.
• PULSETIMER function block can be used, for example, for pulse extensions or limiting of
operation of outputs.
372
On Delay Time 1
OR
On Delay Time 2
OR
On Delay Time 3
OR
0
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PulseTime
t
0
0
Off Delay Time 1
PulseTime
t
AND
0
0
Off Delay Time 2
PulseTime
t
0
Off Delay Time 3
1MRK 506 326-UUS B
AND
Output 1
OR
AND
AND
Output 2
OR
AND
AND
Output 3
OR
AND
ANSI10000055-1-en.vsd
Line distance protection REL650
Technical manual
M11396-4 v10