ABB Relion 650 Series Technical Manual page 298

Section 10
Control
BUS1_OP
BUS1_CL
VB1OK
VB1FF
VB2OK
VB2FF
VLNOK
VLNFF
BLOCK
ANSI08000019 V1 EN-US
Figure 149: Logic diagram for the voltage selection function of a single circuit breaker with double busbars
10.1.8 Technical data
Table 223: SESRSYN (25) technical data
Function
Phase shift, j
Voltage ratio, V
Frequency difference limit between bus and
line
Phase angle difference limit between bus and
line
Voltage difference limit between bus and line
Time delay output for synchronism check
Time delay for energizing check
Closing time for the circuit breaker
292
AND
bus1Voltage
bus2Voltage
AND
OR
AND
OR
OR
- j
line bus
/V
bus line
© Copyright 2011 ABB Power Grids. All rights reserved
OR
AND
AND
_Logic_diagram_for_the_v
oltageselectionfunctionofa
Range or value
(-180 to 180) degrees
0.2 to 5.0
(0.003-1.000) Hz
(5.0-90.0) degrees
(0.000-60.000) s
(0.000-60.000) s
(0.000-60.000) s
1MRK 506 326-UUS B
B1SEL
busVoltage
selectedFuseOK
VSELFAIL
SESRSYN_-
singlecircuit.vsd
Accuracy
-
-
± 2.0 mHz
± 2.0 degrees
± 0.5% of V
n
± 0.5% ± 25 ms
± 0.5% ± 25 ms
± 0.5% ± 25 ms
Line distance protection REL650
Technical manual
M12359-1 v6