ABB Relion 650 Series Technical Manual page 275

1MRK 506 326-UUS B
The FAIL output will be set to a logical one when the following criteria are fulfilled:
• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of the numerical
value of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than the set operate
value
• No phase current has exceeded
• CCSRDIF (87) is enabled by setting
The FAIL output remains activated 100 ms after the AND-gate resets when being activated for
more than 20 ms. If the FAIL lasts for more than 150 ms an ALARM will be issued. In this case the
FAIL and ALARM will remain activated 1 s after the AND-gate resets. This prevents unwanted
resetting of the blocking function when phase current supervision element(s) operate, for
example, during a fault.
I
A
I
B
I
C
I
ref
OPERATION
BLOCK
ANSI05000463 V1 EN-US
Figure 137: Simplified logic diagram for Current circuit supervision CCSRDIF (87)
The operate characteristic is percentage restrained, see figure 138.
Line distance protection REL650
Technical manual
IMinOp .
I I
A
I
å
B
I
C
I
ref
1,5 x I r
© Copyright 2011 ABB Power Grids. All rights reserved
Pickup_Block during the last 10 ms.
Operation = Enabled .
I>Pickup_Block
BLOCK
I>IMinOp
+
å
-
+ +
å å
x
+ -
0,8
AND
10 ms
OR
Secondary system supervision
FAIL
OR
20 ms 100 ms
ALARM
150 ms 1 s
en05000463_ansi.vsd
Section 9
269