Ip Characterization And Fmax Margin System Methodology - Xilinx MicroBlaze Reference Manual

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Table A-12: Parameter Configurations (Cont'd)
Parameter
C_USE_EXTENDED_FSL_INSTR
C_USE_FPU
C_USE_HW_MUL
C_USE_ICACHE
C_USE_MMU
C_USE_MSR_INSTR
C_USE_PCMP_INSTR
C_USE_REORDER_INSTR
C_USE_BRANCH_TARGET_CACHE
C_BRANCH_TARGET_CACHE_SIZE
C_ICACHE_STREAMS
C_ICACHE_VICTIMS
C_DCACHE_VICTIMS
C_ICACHE_FORCE_TAG_LUTRAM
C_DCACHE_FORCE_TAG_LUTRAM
C_ICACHE_ALWAYS_USED
C_DCACHE_ALWAYS_USED
C_D_AXI
C_USE_INTERRUPT
C_USE_STACK_PROTECTION
IP Characterization and f
Introduction
This section describes the methods to determine the maximum frequency (F
operation within a system design. The method enables realistic performance reporting for
any Xilinx FPGA architecture. The maximum frequency of a design is the maximum
frequency at which the overall system can be implemented without encountering timing
issues.
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
Appendix A: Performance and Resource Utilization
Configuration Parameter Values
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0
0
1
0
1
1
2
0
0
1
1
0
0
0
3
0
1
1
1
0
1
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
1
1
1
0
1
1
1
0
0
1
0
0
Margin System Methodology
MAX
www.xilinx.com
0
0
0
0
2
0
0
0
2
0
2
1
1
0
1
1
0
0
3
3
1
0
1
1
1
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
0
1
0
8
0
8
0
8
0
8
0
0
0
0
0
0
0
0
0
1
0
1
1
1
0
1
1
1
0
1
1
0
0
1
1
0
0
0
0
MAX
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0
0
0
2
1
2
1
1
0
3
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
0
) of IP
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