Xilinx MicroBlaze Reference Manual page 180

Table 3-19: Configuration Parameters (Cont'd)
Parameter Name
C_USE_INTERRUPT
C_USE_EXT_BRK
C_USE_EXT_NM_BRK
C_USE_NON_SECURE
C_USE_BRANCH_TARGET_CACHE
C_BRANCH_TARGET_CACHE_SIZE
C_M_AXI_DP_
THREAD_ID_WIDTH
C_M_AXI_DP_DATA_WIDTH
C_M_AXI_DP_ADDR_WIDTH
C_M_AXI_DP_
SUPPORTS_THREADS
C_M_AXI_DP_SUPPORTS_READ
C_M_AXI_DP_SUPPORTS_WRITE
C_M_AXI_DP_SUPPORTS_
NARROW_BURST
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
Chapter 3: MicroBlaze Signal Interface Description
Feature/Description
Enable interrupt
handling
0 = No interrupt
1 = Standard interrupt
2 = Low-latency
interrupt
Enable external break
handling
Enable external non-
maskable break
handling
Use corresponding non-
secure input
Enable Branch Target
3
Cache
Branch Target Cache
3
size:
0 = Default
1 = 8 entries
2 = 16 entries
3 = 32 entries
4 = 64 entries
5 = 512 entries
6 = 1024 entries
7 = 2048 entries
Data side AXI thread ID
width
Data side AXI data width
Data side AXI address
width
Data side AXI uses
threads
Data side AXI support
for read accesses
Data side AXI support
for write accesses
Data side AXI narrow
burst support
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Allowable Default Tool
Values Value Assigned
0, 1, 2 1 yes
0,1 0
0,1 0 yes
0-15 0 yes
0,1 0
0-7 0
1 1
32 32
32-64 32 yes
0 0
1 1
1 1
0 0
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VHDL Type
integer
yes
integer
integer
integer
integer
integer
integer
integer
integer
integer
integer
integer
integer
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