Xilinx MicroBlaze Reference Manual page 145

This indicates to external hardware that it is safe to perform actions such as stopping the
clock, resetting the processor or other IP cores. Different actions can be performed
depending on which output signal is set. To wake up MicroBlaze when in sleep mode, one
(or both) of the
execution after the MBAR instruction.
The
Dbg_Wakeup
wake up. External hardware should handle this signal and wake up the processor, after
performing any other necessary hardware actions such as starting the clock. If debug wake
up is used, the software must be aware that this could be the reason for waking up, and go
to sleep again if no other action is required.
In the simplest case, where no additional actions are needed before waking up the
processor, one of the
input, and the other to the MicroBlaze
Interrupt
MicroBlaze to wake up when an interrupt occurs, or when the debugger requests it.
To implement a software reset functionality, for example the
connected to a suitable reset input, to either reset the processor or the entire system.
The following table summarizes the MBAR sleep mode instructions.
Table 3-4: MBAR Sleep Mode Instructions
Instruction
mbar 16
mbar 8
mbar 24
The block diagram in
clock control. In this example, the clock is stopped when sleep is executed and any interrupt
or debug command enables the clock and wakes the processor.
X-Ref Target - Figure 3-2
Clock Control
Clock
Utility Vector Logic Utility Vector Logic
Interrupt
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
input signals must be set to one. In this case MicroBlaze continues
Wakeup
output signal from MicroBlaze indicates that the debugger requests a
inputs can be connected to the same signal as the MicroBlaze
Wakeup
Assembler Pseudo Instruction
sleep
hibernate
suspend
Figure 3-2 illustrates how to use the sleep functionality to implement
Utility Vector Logic
CLK
SCLR
LOAD
L[0:0]
Figure 3-2: Sleep Clock Control Block Diagram
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Chapter 3: MicroBlaze Signal Interface Description
Dbg_Wakeup
Binary Counter
Utility Buffer
Q[0:0]
BUFGCE
Concat
output. This allows
output signal can be
Suspend
Output Signal
Sleep
Hibernate
Suspend
MicroBlaze
Clk
INTERRUPT Sleep
Wakeup[0:1] Dbg_Wakeup
C_ENABLE_DISCRETE_PORTS = 1
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