Xilinx MicroBlaze Reference Manual page 265

ori Logical OR with Immediate
rD, rA, IMM
ori
1 0 1 0 0 0
0
6
Description
The contents of register rA are ORed with the extended IMM field, sign-extended to 32 bits; the result
is placed into register rD.
Pseudocode
←
(rD) (rA)
Registers Altered
• rD
Latency
• 1 cycle
Note
By default, Type B Instructions will take the 16-bit IMM field value and sign extend it to 32 bits to use
as the immediate operand. This behavior can be overridden by preceding the Type B instruction with
an imm instruction. See the instruction
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
rD rA
11
∨
sext(IMM)
"imm"
www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
IMM
16
for details on using 32-bit immediate values.
31
266
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