Xilinx MicroBlaze Reference Manual page 287

sra Shift Right Arithmetic
rD, rA
sra
1 0 0 1 0 0
0
6
Description
Shifts arithmetically the contents of register rA, one bit to the right, and places the result in rD. The
most significant bit of rA (that is, the sign bit) placed in the most significant bit of rD. The least
significant bit coming out of the shift chain is placed in the Carry flag.
Pseudocode
←
(rD)[0] (rA)[0]
←
(rD)[1:31]
←
MSR[C] (rA)[31]
Registers Altered
• rD
• MSR[C]
Latency
• 1 cycle
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
rD rA
11
(rA)[0:30]
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Chapter 5: MicroBlaze Instruction Set Architecture
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
16 31
288
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