Xilinx MicroBlaze Reference Manual page 20

Table 2-6: MicroBlaze Instruction Set Summary (Cont'd)
Type A
Type B
BRAID Imm 101110
BRALID Rd,Imm 101110
BRKI Rd,Imm 101110
BEQI Ra,Imm 101111
BNEI Ra,Imm 101111
BLTI Ra,Imm 101111
BLEI Ra,Imm 101111
BGTI Ra,Imm 101111
BGEI Ra,Imm 101111
BEQID Ra,Imm 101111
BNEID Ra,Imm 101111
BLTID Ra,Imm 101111
BLEID Ra,Imm 101111
BGTID Ra,Imm 101111
BGEID Ra,Imm 101111
LBU Rd,Ra,Rb 110000
LBUR Rd,Ra,Rb
LBUEA Rd,Ra,Rb 110000
LHU Rd,Ra,Rb 110001
LHUR Rd,Ra,Rb
LHUEA Rd,Ra,Rb 110001
LW Rd,Ra,Rb 110010
LWR Rd,Ra,Rb
LWX Rd,Ra,Rb 110010
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
0-5 6-10 11-15 16-20
0-5 6-10 11-15
00000 11000
Rd 11100
Rd 01100
00000 Ra
00001 Ra
00010 Ra
00011 Ra
00100 Ra
00101 Ra
10000 Ra
10001 Ra
10010 Ra
10011 Ra
10100 Ra
10101 Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
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Chapter 2: MicroBlaze Architecture
21-31
16-31
Imm PC := s(Imm)
Imm PC := s(Imm)
Rd := PC
Imm PC := s(Imm)
Rd := PC
MSR[BIP] := 1
Imm PC := PC + s(Imm) if Ra = 0
Imm PC := PC + s(Imm) if Ra != 0
Imm PC := PC + s(Imm) if Ra < 0
Imm PC := PC + s(Imm) if Ra <= 0
Imm PC := PC + s(Imm) if Ra > 0
Imm PC := PC + s(Imm) if Ra >= 0
Imm PC := PC + s(Imm) if Ra = 0
Imm PC := PC + s(Imm) if Ra != 0
Imm PC := PC + s(Imm) if Ra < 0
Imm PC := PC + s(Imm) if Ra <= 0
Imm PC := PC + s(Imm) if Ra > 0
Imm PC := PC + s(Imm) if Ra >= 0
Rb 00000000000 Addr := Ra + Rb
01000000000 Rd[0:23] := 0
Rd[24:31] := *Addr[0:7]
Rb 00010000000 Addr := Ra & Rb
Rd[0:23] := 0
Rd[24:31] := *Addr[0:7]
Rb 00000000000 Addr := Ra + Rb
01000000000 Rd[0:15] := 0
Rd[16:31] := *Addr[0:15]
Rb 00010000000 Addr := Ra & Rb
Rd[0:15] := 0
Rd[16:31] := *Addr[0:15]
Rb 00000000000 Addr := Ra + Rb
01000000000
Rd := *Addr
Rb 10000000000 Addr := Ra + Rb
Rd := *Addr
Reservation := 1
Semantics
20
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